The present invention relates to a circuit which controls a magnetic head for storing information in a magnetic storage media. In particular, the present invention relates to a write driver circuit which has improved risetime thereby allowing information to be stored in the magnetic storage media at higher rates.
A magnetic storage system includes a magnetic head which stores ("writes") and retrieves ("reads") information from a recording surface of a magnetic media, such as a magnetic disc. The magnetic head includes an inductive coil which reads information from the storage medium by sensing changes in localized magnetic fields in domains in the medium in which information for a binary bit is stored and writes information by creating changes in the magnetizations at those domains to provide a representation for a binary bit in each. A preamplifier system is connected to the magnetic head coil at first and second head contacts. The preamplifier system includes read circuitry and write circuitry for controlling the read and write operations of the head, respectively.
The write circuitry includes a write current driver circuit which is connected across the head contacts. During write operations, the write driver circuit forces a relatively large write current through the inductive coil to create a magnetic field that magnetizes an adjacent domain on the recording surface in a selected direction. Bits of digital information are stored by providing magnetization in one of two opposite directions representing either a "1" or a "0" in the corresponding domain in the magnetic media, the magnetization direction selected by choosing one of two opposite directions for the current flow in the inductive coil.
A known write driver circuit includes an "H-switch" for controlling the direction of current flow through the inductive coil. The H-switch includes upper write switching (pull-up) transistors and lower write switching (pull-down) transistors. The pull-up transistors are connected between a first supply voltage and the head contacts. The pull-down transistors are connected between the head contacts and a second supply voltage through a write current generator, commonly referred to as a current sink. The write current sink includes a write current control transistor connected in series with a resistor.
FIG. 1 shows a circuit schematic diagram of a known implementation of an H-switch based write driver circuit as used in previous systems. An H-switch portion 100 is defined by transistors Q101, Q102, Q104, and Q105 along with resistor R103 and inductor L100. A current mirror is formed by transistors Q103, Q106, and Q107 along with resistors R101 and R102 and I.sub.ref. Positive and negative voltage supply terminals (V.sub.pos and V.sub.neg, respectively) are provided as are write data first (commonly called write data positive, hereinafter "WDP") 102 and write data second (commonly called write data negative, hereinafter "WDN") 104 signal input terminals. Transistors Q108, Q110, Q109 and Q111 along with diodes D101, D102, D103, D104, D105, D106, current sources I101, and 1102, and resistors R104 and R105 form the biasing circuitry for the H-switch driver 100. I102 is a known current source and has a voltage drop across it of approximately one volt.
Write data is applied differentially at the write driver input terminals 102 and 104. There is a voltage differential between voltage signals applied to the WDP 102 and the WDN 104 terminals of approximately 0.5 volts, and the signals are centered approximately about 3.5 volts. When one of WDP 102 or WDN 104 is high, at approximately 3.75 volts, the other is low, at approximately 3.25 volts. If WDP 102 is high so that WDN 104 is low, current from source I102 flows through Q109 to bias the bases of Q104 and Q111 at about 1.4 volts switching them on while the bases of Q101 and Q110 will be near V.sub.neg potential switching them off. Q104, Q111, Q101 and Q110 are npn transistors with a Schottky diode connected between the bases and collectors to prevent hard saturation in the "on" condition, i.e. Schottky transistors.
Saturation occurs when both the emitter and collector junctions of a bipolar transistor are forward biased. Forward biasing a junction reduces the junction barrier which permits minority carrier injection, that is, it permits the holes from the p-type conductivity material side to be injected into the n-type conductivity material and electrons to flow in the opposite direction. When the transistor base-collector junction is forward biased, electrons are accelerated across the base-collector junction as well as the base-emitter junction leading to excess minority carrier storage in the base which must be removed before the transistor can be switched off. The Schottky diode limits the forward bias of the base-collector junction to reduce the storage of carriers in the base. The excess minority carrier storage can be modeled by nonlinear capacitance.
The base of Q105 will be driven to a low voltage by Q111 being switched on, therefore Q105 is switched off while current will be drawn from the emitter of Q102 through inductor L100 and resistor R103 by Q104 being switched on. The base potential of Q102 is held slightly below V.sub.pos due to the voltage drop across R104. Therefore, substantial current flows from the emitter of Q102 through L100 and R103 to the collector of Q104. The current flowing into the collector Q104 flows through the emitter of Q104 into the collector of current sink Q103 and on through the emitter of Q103 to the V.sub.neg terminal.
In the opposite situation with the WDN terminal 104 at the higher input signal voltage and the WDP terminal 102 at the lower, Q108 is switched on and is drawing current from source 1102 which switches on Q101 and Q110. Transistor Q109 is switched off and, as a result, so are transistors Q104 and Q111. The inductive load L100 prevents an instantaneous change in current, and so will switch the direction of current through R103. The base of Q102 is driven to a low voltage and thus is switched off while current will be drawn from the emitter of Q105 through inductor L100 and resistor R103 by Q101 being switched on. The base potential of Q105 is held slightly below V.sub.pos due to the voltage drop across R105. Therefore, substantial current flows from the emitter of Q105 through L100 and R103 to the collector of Q101. The current flowing into the collector of Q101 flows out its emitter into the collector of current sink Q103 and out its emitter to the V.sub.neg terminal.
An important factor to consider in switching speed is how quickly the transistors in the H-switch can change states from off to on and vice-versa. In a common H-switch device, a current reversal through the head coil inductor depends in part on a RC time delay, for example, in FIG. 1, Q102 base capacitance with resistor R104. Additionally, the speed of the H-switch transition is directly proportional to the available voltage supply thereto. The rate at which information can be stored on a recording medium is directly proportional to the rate at which the direction of current flow can be reversed in the head inductive coil to thereby cause a change in the magnetic field. Also, switching on and off times of the transistors in the circuit directly effect the transition speed. A transistor that is not hard into saturation has a much quicker on to off switching time than a transistor that is so saturated because dissipating excess minority carrier charges stored in the transistor base is eliminated. There is a continuing need to improve write driver circuits to improve the speed of current transition therein.